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AMD’s ‘Rome’ Epyc module will have 64 Zen 2 cores and 2X performance


Advanced Micro Devices said that its next-generation Epyc server chip module, code-named Rome, will have 64 cores based on the Zen 2 architecture. It will also have twice the performance per central processing unit socket as the previous generation, and it will have four times the floating point performance per socket. Rome will consist of eight chips, with eight cores per die, all glued together in a multichip module with accompanying input-output functions — in a single socket. Lisa Su, CEO of AMD, said that the new chip module will debut next year with a 7-nanometer manufacturing process (where the circuits are seven billionths of a meter wide). Rome will have eight 7-nanometer cores per die (or chip), plus a 14-nanometer input/output die. It is the best datacenter processor in the industry, said Su, speaking onstage at the AMD press and analyst day in San Francisco. We are absolutely on track to debut Rome in 2019. This is our space. This is where we lead. The input-output chip will be made with a 14-nanometer manufacturing process. Su and AMD senior vice president Forrest Norrod showed a demo of Rome executing a benchmark. It completed the test in 28 seconds, in comparison to 30 seconds for an Intel two-socket solution with the Intel Xeon Scalable 8180M. Thats a pretty impressive result, said Bob ODonnell, analyst at TECHnalysis Research. The Rome module will have Zen 2 cores, which are based on the second-generation architecture of the Zen platform that AMD introduced in the spring of 2017. Those Zen chips could execute 52 percent more instructions per clock cycle than the previous generation, and Su said that the Rome chips will beat that measure. Zen 2 chips are sampling today at 7-nanometer manufacturing, compared to the shipping 14-nanometer Zen processors that debuted in 2017. Zen 3 is on track to debut on 7-nanometer in 2020. AMD is using TSMC, the chip contract manufacturer, to make its 7-nanometer chips. Intel, meanwhile, has delayed its equivalent chips, dubbed 10-nanometer but at the same technology level, until late 2019. Zen 2 can get twice the throughput thanks to better branch prediction, or predicting what kind of processing will be necessary for the next computation. It also has better 256-bit load/store floating point processing, or double the previous generation. Zen 2 will also have stronger built-in security, where data can be fully encrypted as it is transferred to memory. Norrod said that Epyc adoption can lead to 45 percent lower total cost of ownership (TCO) compared to Intel-based systems. He said that comes as a result of lower admin, licensing, hardware, and space costs. Pete Ungaro, CEO of Cray, said onstage that his companys upcoming Shasta supercomputer will use AMD Epyc processors. The machine will be made for government agencies such as the Lawrence Berkeley National Laboratory and will run at 100 petaflops. Patrick Moorhead, analyst at Moor Insights & Strategy, said he thinks the large multichip modules are the future of entire chip industry. AMD called the chip components within this package chiplets. As for Rome, he said, AMD is showing yet again its commitment to a very aggressive product improvement roadmap. With Rome, AMD is changing everything. It is changing its system-on-chip architecture to 7-nanometer chiplets with an improved Infinity Fabric, doubling cores per socket, doubling bandwidth per socket, adding PCIe 4.0 and improving core and FPU capabilities. He added, AMD says this will deliver an impressive 2X performance per socket and 4X on floating point unit (FPU) per socket. With all these improvements, AMD made Rome socket-compatible with Naples, which should accelerate uptake with [computer makers] and ultimately, end customers. As AMD has delivered on its promises the last two years, I have little doubt AMD will deliver on-time, at quality.

AMD reveals Zen 2 processor architecture in bid to stay ahead of Intel


Advanced Micro Devices revealed the Zen 2 architecture for the family of processors that it will launch in the coming years, starting with 2019. The move is a follow-up to the competitive Zen designs that AMD launched in March 2017, and it promises two-times improvement in performance throughput. AMD hopes the Zen 2 processors will keep it ahead of or at parity with Intel, the worlds biggest maker of PC processors. The earlier Zen designs enabled chips that could process 52 percent more instructions per clock cycle than the previous generation. Lisa Su, CEO of Santa Clara, California-based AMD, made the announcement at an AMD press and analyst event in San Francisco. So much has really happened in the last two years, she said. Ive been CEO for four years. Its been an incredible four years. But we are just at the beginning of our journey. Zen has spawned AMDs most competitive chips in a decade, including Ryzen for the desktop, Threadripper (with up to 32 cores) for gamers, Ryzen Mobile for laptops, and Epyc for servers. In the future, you can expect to see Zen 2 cores in future models of those families of chips. AMDs focus is on making central processing units (CPUs), graphics processing units (GPUs), and accelerated processing units (APUs) that put the two other units together on the same chip. Zen 2 is our next-generation system architecture, Su said, noting chips using it will be made with 7-nanometer manufacturing, where the width between circuits is seven billionths of a meter. Su said the new chips will be targeted for the workloads of the future, including machine learning, big data analytics, cloud, and other tasks. AMD is going after the $29 billion total available market for data center chips by 2021. We see strong double-digit growth for the foreseeable future for the overall market, she said. We are not looking at incremental changes. The products you are seeing today are the products of the decisions we made four or five years ago. They were bets on where we think the market was going. The Zen-based designs are AMDs most competitive in a decade, and it now has every major computer maker using the Epyc chips for servers, from HP Enterprise to Dell. It is also feeding chips to data centers that run cloud deployments for Microsoft, Baidu, Tencent, Oracle, and others. AMD and Amazon Web Services announced today that Amazon Elastic Compute Cloud will use AMD Epyc CPUs, so customers can get access today to instances running on the AMD processors. Intel noted that it has an extensive relationship with AWS. The next-generation Epyc platform is code-named Rome, which will debut next year with 7-nanometer technology. Mark Papermaster, AMD chief technology officer, said AMD took a holistic design approach to creating Zen 2. Zen 2 marks the delivery of our promise of continuity, he said. We called a play and we are delivering. We are executing. Zen 2 chips are sampling today at 7-nanometer manufacturing, compared to the shipping 14-nanometer Zen processors that debuted in 2017. Zen 3 is on track to debut on 7-nanometer in 2020. AMD is using TSMC, the chip contract manufacturer, to make its 7-nanometer chips. Intel, meanwhile, has delayed its equivalent chips, dubbed 10-nanometer but at the same technology level, until late 2019. Zen 2 can get twice the throughput thanks to better branch prediction, or predicting what kind of processing will be necessary for the next computation. It also has better 256-bit load/store floating point processing, or double the previous generation. Zen 2 will also have stronger built-in security, where data can be fully encrypted as it is transferred to memory. You will see a huge jump as we go to Zen 2 products, Papermaster said. Intel has not yet made a comment, but it has scheduled a December 11 event to talk about its architecture. AMD also has a chiplet design approach with modular components on the chip that can more efficiently feed and receive data from processor cores. It will also have higher instructions per clock than the original Zen products. Kevin Krewell, analyst at Tirias Research, noted that AMD did not describe the instructions per clock cycle for Zen 2, but he assumes it will be better than the original Zen. He noted the doubled floating point performance figure was impressive. Forrest Norrod, senior vice president at AMD said that Epyc adoption can lead to 45 percent lower total cost of ownership (TCO) compared to Intel-based systems. He said that comes as a result of lower admin, licensing, hardware, and space costs. Pete Ungaro, CEO of Cray, said onstage that Crays next Shasta supercomputer with use AMD Epyc processors. The machine will be made for government agencies such as the Lawrence Berkeley National Laboratory and run at 100 petaflops.